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Z86C33/C43 CP95DZ80202
CUSTOMER PROCUREMENT SPECIFICATION
Z86C33/C43
CMOS Z8(R) CONSUMER CONTROLLER PROCESSOR
FEATURES
Part Z86C33 Z86C43 ROM (KB) 4 4 RAM* (Bytes) 237 236 Speed (MHz) 12, 16 12, 16
s
32 Input/Output Lines (C43) 24 Input/Output Lines (C33) Vectored, Prioritized Interrupts with Programmable Polarity Two Analog Comparators Two Programmable 8-Bit Counter/Timers, Each with Two 6-Bit Programmable Prescaler Watch-Dog Timer (WDT)/Power-On Reset (POR) On-Chip Oscillator that Accepts a Crystal, Ceramic Resonator, LC, RC, or External Clock RAM and ROM Protect
s
* General-Purpose
s
40-Pin DIP, 44-Pin PLCC and QFP Packages (C43) 28-Pin DIP, 28-Pin SOIC (C33) 3.0- to 5.5-Volt Operating Range Low-Power Consumption -40C to +105C Operating Range Expanded Register File (ERF)
s s
s s s s
s s
s
GENERAL DESCRIPTION
The Z86C33/C43 Consumer Controller Processor (CCPTM) is a member of Zilog's Z8(R) single-chip microcontroller family with enhanced wake-up circuitry, programmable Watch-Dog Timers (WDT), and low-noise/EMI options. These enhancements result in a more efficient, costeffective design and provide the user with increased design flexibility over the standard Z8 microcontroller core. This low-power consumption CMOS microcontroller offers fast execution, efficient use of memory, sophisticated interrupts, input/output bit manipulation capabilities, and easy hardware/software system expansion. The Z86C33/C43 features an Expanded Register File (ERF) to allow access to register-mapped peripheral and I/O circuits. Four basic address spaces are available to support this wide range of configurations: Program Memory, Register File, Data Memory, and ERF. The Register File is composed of 236 bytes of general-purpose registers, four I/O port registers, and 15 control and status registers. The ERF consists of three control registers For applications demanding powerful I/O capabilities, the Z86C33 provides 24 pins, and the Z86C43 provides 32 pins dedicated to input and output. These lines are configurable under software control to provide timing, CP95DZ80202 9/95 status signals, parallel I/O with or without handshake, and address/data bus for interfacing external memory. To unburden the system from coping with real-time tasks such as counting/timing and data communication, the Z86C33/C43 offers two on-chip counter/timers with a large number of user-selectable modes. With ROM/ROMless selectivity, the Z86C43 provides both external memory and pre-programmed ROM, which enables this Z8 microcontroller to be used in high-volume applications, or where code flexibility is required.
Notes: All Signals with a preceding front slash, "/", are active Low, e.g.: B//W (WORD is active Low); /B/W (BYTE is active Low, only). Power connections follow conventional descriptions below: Connection Power Ground Circuit VCC GND Device VDD VSS
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Z86C33/C43 CP95DZ80202
GENERAL DESCRIPTION (Continued)
(C43 Only) Output Input
Vcc
GND
XTAL /AS /DS R//W /RESET
Port 3
Machine Timing & Inst. Control RESET WDT POR ,
Counter/ Timers (2)
ALU
Interrupt Control
FLAG
Prg. Memory 4K
Two Analog Comparators
Register Pointer Register File Program Counter
Port 2
Port 0
Port 1
4 I/O (Bit Programmable)
4
8
Address or I/O (Nibble Programmable)
Address/Data or I/O (Byte Programmable) (C43 Only)
Functional Block Diagram
2
Z86C33/C43 CP95DZ80202
PIN DESCRIPTION
28-Pin DIP/SOIC Pin Identification
P25 P26 P27 P04 P05 P06 P07 VDD XTAL2 XTAL1 P31 P32 P33 P34 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Z86C33 28 27 26 25 24 23 22 21 20 19 18 17 16 15 P24 P23 P22 P21 P20 P03 VSS P02 P01 P00 P30 P36 P37 P35
Pin # Symbol 1-3 4-7 8 9 P27-25 P07-04 VDD XTAL2
Function Port 2, Pins 5,6,7 Port 0, Pins 4,5,6,7 Power Supply Crystal Oscillator Crystal Oscillator Port 3, Pins 1,2,3 Port 3, Pins 4,5 Port 3, Pin 7 Port 3, Pin 6 Port 3, Pin 0 Port 0, Pins 0,1,2 Ground Port 0, Pin 3 Port 2, Pins 0,1,2,3,4
Direction In/Output In/Output Output Input Fixed Input Fixed Output Fixed Output Fixed Output Fixed Input In/Output In/Output In/Output
10 XTAL1 11-13 P33-31 14-15 P35-4 16 P37 17 P36 18 P30 19-21 P02-00 22 VSS 23 P03 24-28 P24-20
28-Pin DIP Pin Configuration
P25 P26 P27 P04 P05 P06 P07 VDD XTAL2 XTAL1 P31 P32 P33 P34
1 2 3 4 5 6 7 8 9 10 11 12 13 14
Z86C33
28 27 26 25 24 23 22 21 20 19 18 17 16 15
P24 P23 P22 P21 P20 P03 VSS P02 P01 P00 P30 P36 P37 P35
28-Pin SOIC Pin Configuration
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Z86C33/C43 CP95DZ80202
PIN DESCRIPTION (Continued)
R//W P25 P26 P27 P04 P05 P06 P14 P15 P07 VCC P16 P17 XTAL2 XTAL1 P31 P32 P33 P34 /AS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Z86C43 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 /DS P24 P23 P22 P21 P20 P03 P13 P12 GND P02 P11 P10 P01 P00 P30 P36 P37 P35 /RESET
40-Pin DIP Assignments 40-Pin Dual-In-Line Package Pin Identification Pin # Symbol 1 2-4 5-7 8-9 10 11 12-13 14 15 16-18 19 20 21 R//W P25-27 P04-06 P14-15 P07 VCC P16-17 XTAL2 XTAL1 P31-33 P34 /AS /RESET Function Read/Write Port 2, Pins 5,6,7 Port 0, Pins 4,5,6 Port 1, Pins 4,5 Direction Output In/Output In/Output In/Output Pin # Symbol 22 23 24 25 26-27 28-29 30 31 32-33 34 35-39 40 P35 P37 P36 P30 P00-01 P10-11 P02 GND P12-13 P03 P20-24 /DS Function Port 3, Pin 5 Port 3, Pin 7 Port 3, Pin 6 Port 3, Pin 0 Port 0, Pin 0,1 Port 1, Pin 0,1 Port 0, Pin 2 Ground Port 1, Pin 2,3 Port 0, Pin 3 Port 2, Pin 0,1,2,3,4 Data Strobe Direction Output Output Output Input In/Output In/Output In/Output In/Output In/Output In/Output Output
Port 0, Pin 7 In/Output Power Supply Port 1, Pins 6,7 In/Output Crystal, Oscillator Clock Output Crystal, Oscillator Clock Port 3, Pins 1,2,3 Port 3, Pin 4 Address Strobe Reset Input Input Output Output Input
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Z86C33/C43 CP95DZ80202
PIN DESCRIPTION (Continued)
GND GND P20 P03 P13 P12 P02 P10 P01 P00 P11
6 P21 P22 P23 P24 /DS N/C R//W P25 P26 P27 P04 7 8 9 10 11 12 13 14 15 16 17
5
4
3
2
1
44 43 42 41 40 39 38 37 36 35 P30 P36 P37 P35 /RESET R//RL /AS P34 P33 P32 P31
Z86C43
34 33 32 31 30 29
18 19 20 21 22 23 24 25 26 27 28
VCC VCC P05 P06 P14 P15 P07 P16 P17 XTAL2 XTAL1
44-Pin PLCC Pin Assignments
44-Pin PLCC Pin Identification Pin # Symbol 1-2 3-4 5 6-10 11 12 13 14-16 17-19 20-21 22 23,24 25-26 27 GND P12-13 P03 P20-24 /DS N/C R//W P25-27 P04-06 P14-15 P07 VCC P16-17 XTAL2 Function Ground Port 1, Pins 2,3 Port 0, Pin 3 Port 2, Pins 0,1,2,3,4 Data Strobe Not Connected Read/Write Port 2, Pins 5,6,7 Port 0, Pins 4,5,6 Port 1, Pins 4,5 Direction In/Output In/Output In/Output Output Output In/Output In/Output In/Output Pin # Symbol 28 29-31 32 33 34 35 36 37 38 39 XTAL1 P31-33 P34 /AS R//RL /RESET P35 P37 P36 P30 Function Crystal, Oscillator Clock Port 3, Pins 1,2,3 Port 3, Pin 4 Address Strobe ROM/ROMless Control Reset Port 3, Pin 5 Port 3, Pin 7 Port 3, Pin 6 Port 3, Pin 0 Port 0, Pins 0,1 Port 1, Pins 0,1 Port 0, Pin 2 Direction Input Input Output Output Input Input Output Output Output Input In/Output In/Output In/Output
Port 0, Pin 7 In/Output Power Supply Port 1, Pins 6,7 In/Output Crystal, Oscillator Clock Output
40-41 P00-01 42-43 P10-11 44 P02
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Z86C33/C43 CP95DZ80202
PIN DESCRIPTION (Continued)
GND GND P20 P03 P13 P12 P02 P10 P01 P00 P11
33 32 31 30 29 28 27 26 25 24 23 P21 P22 P23 P24 /DS N/C R//W P25 P26 P27 P04 34 35 36 37 38 39 40 41 42 43 44 1 2 3 4 5 6 7 8 9 10 11 22 21 20 19 18 P30 P36 P37 P35 /RESET R//RL /AS P34 P33 P32 P31
Z86C43
17 16 15 14 13 12
VCC
VCC
P05
P06
P14
P15
P07
P16
P17
XTAL2
44-Pin QFP Pin Assignments
44-Pin QFP Pin Identification Pin # Symbol 1-2 3-4 5 6-7 8-9 10 11 12-14 15 16 17 18 19 20 P05-06 P14-15 P07 VCC P16-17 XTAL2 XTAL1 P31-33 P34 /AS R//RL /RESET P35 P37 Function Port 0, Pins 5,6 Port 1, Pins 4,5 Port 0, Pin 7 Power Supply Port 1 Pins 6,7 Crystal, Oscillator Clock Crystal, Oscillator Clock Port 3, Pins 1,2,3 Port 3, Pin 4 Address Strobe ROM/ROMless Control Reset Port 3, Pin 5 Port 3, Pin 7 Direction In/Output In/Output In/Output In/Output Output Input Input Output Output Input Input Output Output Pin # Symbol 21 22 23-24 25-26 27 28-29 30-31 32 33-37 38 39 40 41-43 44 P36 P30 P00-01 P10-11 P02 GND P12-13 P03 P20-24 /DS N/C R//W P25-27 P04 Function Port 3, Pin 6 Port 3, Pin 0 Port 0, Pins 0,1 Port 1, Pins 0,1 Port 0, Pin 2 Ground Port 1, Pins 2,3 Port 0, Pin 3 Port 2, Pins 0,1,2,3,4 Data Strobe Not Connected Read/Write Port 2, Pins 5,6,7 Port 0, Pin 4 Direction Output Input In/Output In/Output In/Output In/Output In/Output In/Output Output Output In/Output In/Output
6
XTAL1
Z86C33/C43 CP95DZ80202
ABSOLUTE MAXIMUM RATINGS
Symbol VCC TSTG TA Description Min Max +7.0 +150 2.2 Units V C C W Stress greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; operation of the device at any condition above those indicated in the operational sections of these specifications is not implied. Exposure to absolute maximum rating conditions for an extended period may affect device reliability.
Supply Voltage (*) -0.3 Storage Temp -65 Oper Ambient Temp Power Dissipation
Notes: * Voltage on all pins with respect to GND. See Ordering Information.
STANDARD TEST CONDITIONS
The characteristics listed below apply for standard test conditions as noted. All voltages are referenced to GND. Positive current flows into the referenced pin (see Test Load Diagram).
From Output Under T est
150 pF
Test Load Diagram
CAPACITANCE TA = 25C, VCC = GND = 0V, f = 1.0 MHz, Unmeasured pins to GND
Parameter Input capacitance Output capacitance I/O capacitance Max 12 pF 12 pF 12 pF
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Z86C33/C43 CP95DZ80202
DC ELECTRICAL CHARACTERISTICS
TA = 0 C to +70C Min Max 7 7 0.7 VCC 0.7 VCC GND-0.3 GND-0.3 0.7 VCC 0.7 VCC VCC+0.3 VCC+0.3 0.2 VCC 0.2 VCC VCC+0.3 VCC+0.3 0.7 VCC 0.7 VCC GND-0.3 GND-0.3 0.7 VCC 0.7 VCC TA = -40C to +105C Typical [13] Min Max @ 25C Units Conditions 7 7 VCC+0.3 VCC+0.3 0.2 VCC 0.2 VCC VCC+0.3 VCC+0.3 1.3 2.5 0.7 1.5 1.3 2.5 0.7 1.5 3.1 4.8 0.2 0.1 0.3 0.3 1.5 2.1 1.1 1.7 10 10 <1 <1 <1 <1 -25 -40 7 20 5 15 2.0 3.7 1.5 2.9 1 2 310 600 V V V V V V V V V V V V V V V V V V V V mV mV A A A A A A mA mA mA mA mA mA mA mA A A A A [10] [10] VIN = OV, VCC VIN = OV, VCC VIN = OV, VCC VIN = OV, VCC IIN < 250 A IIN < 250 A Driven by External Clock Generator Driven by External Clock Generator Driven by External Clock Generator Driven by External Clock Generator
Sym Parameter Max Input Voltage VCH VCL VIH VIL VOH1 VOL1 VOL2 VRH VRl
VCC Note [3] 3.0V 5.5V
Notes
Clock Input High Voltage 3.0V 5.5V Clock Input Low Voltage Input High Voltage Input Low Voltage Output High Voltage Output Low Voltage Output Low Voltage 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V
GND-0.3 0.2 VCC GND-0.3 0.2 VCC VCC-0.4 VCC-0.4 0.6 0.4 1.2 1.2 .8 VCC VCC .8 VCC VCC GND-0.3 0.2 VCC GND-0.3 0.2 VCC 25 25 2 2 1 1 -130 -180 20 25 15 20 4.5 8 3.4 7.0 8 10 500 800
GND-0.3 0.2 VCC GND-0.3 0.2 VCC VCC-0.4 VCC-0.4 0.6 0.4 1.2 1.2 .8 VCC VCC .8 VCC VCC GND-0.3 0.2 VCC GND-0.3 0.2 VCC 25 25 2 2 2 2 -130 -180 20 25 15 20 4.5 8 3.4 7.0 8 10 600 1000
IOH = -2.0 mA IOH = -2.0 mA IOL = +4.0 mA IOL = +4.0 mA IOL = +6 mA IOL = +12 mA
[8] [8] [8] [8] [8] [8]
Reset Input High Voltage 3.0V 5.5V Reset Input Low Voltage 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V
VOFFSET Comparator Input Offset Voltage IIL Input Leakage IOL IIR ICC Output Leakage Reset Input Current Supply Current
-1 -1 -1 -1
-1 -1 -1 -1
@ 16 MHz @ 16 MHz @ 12 MHz @ 12 MHz HALT Mode VIN = OV, VCC @ 16 MHz HALT Mode VIN = OV, VCC @ 16 MHz Clock Divide-by-16 @ 16 MHz Clock Divide-by-16 @ 16 MHz STOP Mode VIN = OV, VCC WDT is not Running STOP Mode VIN = OV, VCC WDT is not Running STOP Mode VIN = OV, VCC WDT is Running STOP Mode VIN = OV, VCC WDT is Running
[4] [4] [4] [4] [4] [4] [4] [4] [6,11] [6,11] [6,11,14] [6,11,14]
ICC1
Standby Current
ICC2
Standby Current
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Z86C33/C43 CP95DZ80202
DC ELECTRICAL CHARACTERISTICS (Continued)
TA = 0 C to +70C Min Max 0 0 0.7 1.4 -0.6 -1.0 2.05 3.3V 5.0V 3.3V 5.0V VCC-0.4 VCC-0.4 0.6 0.4 VCC-1.0V VCC-1.0V 8 15 -5 -8 2.95 TA = -40C to +105C Min Max 0 0 0.7 1.4 -0.6 -1.0 1.8 VCC-0.4 VCC-0.4 0.6 0.4 VCC-1.5V VCC-1.5V 10 20 -7 -10 3.3 2.4 4.7 -1.8 -3.8 2.6 3.1 4.8 0.2 0.1
Sym Parameter VICR IALL IALH VLV VOH VOL Input Common Mode Voltage Range Auto Latch Low Current Auto Latch High Current VCC Low Voltage Protection Voltage Output High Voltage (Low EMI Mode) Output Low Voltage (Low EMI Mode)
VCC Note [3] 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V
Typical [13] @ 25C Units V V A A A A V V V V V
Conditions
Notes [10] [10]
OV < VIN < VCC OV < VIN < VCC OV < VIN < VCC OV < VIN < VCC 2 MHz max Int. CLK Freq. IOH = -0.5 mA IOH = -0.5 mA IOL = 1.0 mA IOL = 1.0 mA
[9] [9] [9] [9] [7]
Notes: Typ Max Unit Freq [1] ICC1 Clock-Driven 0.3 mA 5 mA 8 MHz Resonator or Crystal 3.0 mA 5 mA 8 MHz [5] [2] GND = 0V. [3] The VDD voltage specification of 3.0V guarantees 3.3V 0.3V, and the VDD voltage specification of 5.5V guarantees 5.0V 0.5V. [4] All outputs unloaded, I/O pins floating, inputs at rail. [5] CL1 = CL2 = 10 pF. [6] Same as note [4] except inputs at VCC. [7] The VLV voltage increases as the temperature decreases and will overlap lower VCC operating region. [8] Standard Mode (not Low EMI). [9] Auto Latch (Mask Option) selected. [10] For analog comparator, inputs when analog comparators are enabled. [11] Clock must be forced Low, when XTAL 1 is clock-driven and XTAL2 is floating. [12] Excludes clock pins. [13] Typicals are at VCC = 5.0V and 3.3V. [14] Internal RC selected.
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Z86C33/C43 CP95DZ80202
AC CHARACTERISTICS External I/O or Memory Read and Write Timing Diagram (C43 Only)
R//W
13 12 19
Port 0, /DM
16 18 3
20
Port 1
1
A7 - A0
2
D7 - D0 IN
9
/AS
8 4 5 6 11
/DS (Read)
17
10
Port1
A7 - A0
14
D7 - D0 OUT
15 7
/DS (Write)
External I/O or Memory Read/Write Timing (Z86C43 Only)
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Z86C33/C43 CP95DZ80202
AC CHARACTERISTICS External I/O or Memory Read and Write Timing Table (C43 Only)
(SCLK/TCLK = XTAL/2) Note [3] VCC 3.0 5.5 3.0 5.5 3.0 5.5 3.0 5.5 3.0 5.5 3.0 5.5 3.0 5.5 3.0 5.5 3.00 5.5 3.0 5.5 3.0 5.5 3.0 5.5 TA=-0C to 70C 12 MHz 16 MHz Min Max Min Max 35 35 45 45 250 250 55 55 0 0 200 200 110 110 150 150 0 0 45 55 30 45 45 45 45 45 55 55 45 45 310 310 65 65 35 35 45 45 45 45 45 45 30 30 35 35 35 35 0 0 50 50 35 35 25 25 35 35 25 25 35 35 230 230 65 65 35 35 45 45 45 45 40 40 0 0 135 135 80 80 75 75 0 0 45 55 30 45 45 45 45 45 55 55 45 45 310 310 45 45 30 30 35 35 35 35 25 25 35 35 180 180 55 55 0 0 200 200 110 110 150 150 0 0 50 50 35 55 25 25 35 35 25 25 35 35 230 230 TA = -40C to +105C 12 MHz 16 MHz Min Max Min Max 35 35 45 45 250 250 40 40 0 0 135 135 80 80 75 75 25 25 35 35 ns ns ns 180 180
No Symbol 1 TdA(AS) 2 TdAS(A) 3 TdAS(DR) 4 TwAS 5 TdAS(DS) 6 TwDSR 7 TwDSW
Parameter Address Valid to /AS Rise Delay /AS Rise to Address Float Delay /AS Rise to Read Data Req'd Valid /AS Low Width Address Float to /DS Fall /DS (Read) Low Width /DS (Write) Low Width
Units [2] [2] ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
Notes
[1,2] [2]
[1,2] [1,2] [1,2] [2] [2] [2] [2] [2] [2] [2] [1,2] [2] [2]
8 TdDSR(DR) /DS Fall to Read Data Req'd Valid 9 ThDR(DS) Read Data to /DS Rise Hold Time 10 TdDS(A) 11 TdDS(AS) /DS Rise to Address Active Delay /DS Rise to /AS Fall Delay
12 TdR/W(AS) R//W Valid to /AS Rise Delay 13 TdDS(R/W) /DS Rise to R//W Not Valid
3.0 5.5 14 TdDW(DSW) Write Data Valid to /DS Fall (Write) Delay 3.0 5.5 15 TdDS(DW) /DS Rise to Write Data Not Valid Delay 16 TdA(DR) 17 TdAS(DS) Address Valid to Read Data Req'd Valid /AS Rise to /DS Fall Delay 3.0 5.5 3.0 5.5 3.0 5.5 3.0 5.5
18 TdDM(AS) /DM Valid to /AS Fall Delay 19 TdDS(DM) /DS Rise to DM Valid Delay 20 ThDS(AS) /DS Valid to Address Valid Hold Time
Notes: [1] When using extended memory timing add 2 TpC. [2] Timing numbers given are for minimum TpC. [3] The VCC voltage specification of 3.0V guarantees 3.3V 0.3V, and the VDD voltage specification of 5.5V guarantees 5.0V 0.5V.
Standard Test Load All timing references use 0.7 VCC for a logic 1 and 0.2 VCC for a logic 0.
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Z86C33/C43 CP95DZ80202
AC ELECTRICAL CHARACTERISTICS Additional Timing Diagram
1 3
Clock
2 7 7 2 3
TIN
4 6 5
IRQN
8 9
Clock Setup
11
Stop Mode Recovery Source
10
Additional Timing
12
Z86C33/C43 CP95DZ80202
AC ELECTRICAL CHARACTERISTICS Additional Timing Table (SCLK/TCLK = XTAL/2)
TA = 0C to +70C 12 MHz 16 MHz Min Max Min Max 83 83 DC DC 15 15 62.5 62.5 DC DC 15 15 TA =-4 0C to +105C 12 MHz 16 MHz Min Max Min Max 83 83 DC DC 15 15 62.5 62.5 DC DC 15 15
No Symbol 1 2 3 4 5 6 7 TpC TrC,TfC TwC TwTinL TwTinH TpTin
Parameter Input Clock Period Clock Input Rise & Fall Times Input Clock Width Timer Input Low Width Timer Input High Width Timer Input Period Timer Input Rise & Fall Timer Int. Request Low Time Int. Request Low Time Int. Request Input High Time
VCC Note [6] 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V
Units ns ns ns ns ns ns ns ns
Notes [1] [1] [1] [1] [1] [1] [1] [1] [1] [1] [1] [1]
41 41 100 70 5TpC 5TpC 8TpC 8TpC 100 100 100 70 5TpC 5TpC 5TpC 5TpC 12 12 5TpC 5TpC 7 3.5 14 7 28 14 112 56 3 1.5
31 31 100 70 5TpC 5TpC 8TpC 8TpC 100 100 100 70 5TpC 5TpC 5TpC 5TpC 12 12 5TpC 5TpC 7 3.5 14 7 28 14 112 56 3 1.5
41 41 100 70 5TpC 5TpC 8TpC 8TpC 100 100 100 70 5TpC 5TpC 5TpC 5TpC 12 12 5TpC 5TpC 7 3.5 14 7 28 14 112 56 3 1
31 31 100 70 5TpC 5TpC 8TpC 8TpC 100 100 100 70 5TpC 5TpC 5TpC 5TpC 12 12 5TpC 5TpC 7 3.5 14 7 28 14 112 56 3 1
TrTin, TfTin 8A TwIL 8B TwIL 9 TwIH
ns ns ns ns
[1] [1] [1,2] [1,2] [1,3] [1,3] [1,2] [1,2]
10 Twsm 11 Tost
STOP Mode Recovery Width Spec 3.0V 5.5V Oscillator Startup Time 3.0V 5.5V Watch-Dog Timer Delay Time 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V
ns ns [4] [4] ms ms ms ms ms ms ms ms ms ms D1, D0 0, 0 [5] 0, 0 [5] 0, 1 [5] 0, 1 [5] 1, 0 [5] 1, 0 [5] 1, 1 [5] 1, 1 [5]
12 Twdt
13 TPOR
Power-On Reset Delay
24 13
24 13
25 14
25 14
Notes: [1] Timing Reference uses 0.7 VCC for a logic 1 and 0.2 VCC for a logic 0. [2] Interrupt request via Port 3 (P31-P33). [3] Interrupt request via Port 3 (P30). [4] SMR-D5 = 0. [5] Reg. WDTMR. [6] The VCC voltage specification of 3.0V guarantees 3.3V 0.3V, and the VDD voltage specification of 5.5V guarantees 5.0V 0.5V.
13
Z86C33/C43 CP95DZ80202
AC ELECTRICAL CHARACTERISTICS Additional Timing Table (Divide-By-One Mode, SCLK/TCLK = XTAL)
TA = 0C to +70C TA = 40C to +105C 4 MHz 4 MHz Min Max Min Max 250 250 DC DC 25 25 250 250 DC DC 25 25
No Symbol 1 2 3 4 5 6 7 8A 8B 9 10 11 TpC TrC,TfC TwC TwTinL TwTinH TpTin TrTin, TfTin TwIL TwIL TwIH Twsm Tost
Parameter Input Clock Period Clock Input Rise & Fall Times Input Clock Width Timer Input Low Width Timer Input High Width Timer Input Period Timer Input Rise & Fall Timer Int. Request Low Time Int. Request Low Time Int. Request Input High Time
VCC Note [6] 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V
Units ns ns ns ns ns ns ns ns
Notes [1,7,8] [1,7,8] [1,7,8] [1,7,8] [1,7,8] [1,7,8] [1,7,8] [1,7,8] [1,7,8] [1,7,8] [1,7,8] [1,7,8]
125 125 100 70 3TpC 3TpC 4TpC 4TpC 100 100 100 70 3TpC 3TpC 3TpC 3TpC 12 12 5TpC 5TpC
125 125 100 70 3TpC 3TpC 4TpC 4TpC 100 100 100 70 3TpC 3TpC 3TpC 2TpC 12 12 5TpC 5TpC
ns ns ns ns
[1,7,8] [1,7,8] [1,2,7,8] [1,2,7,8] [1,3,7,8] [1,3,7,8] [1,2,7,8] [1,2,7,8]
STOP Mode Recovery Width Spec 3.0V 5.5V Oscillator Startup Time 3.0V 5.5V
ns ns
[4,8] [4,8] [4,8,9] [4,8,9]
Notes: [1] Timing Reference uses 0.7 VCC for a logic 1 and 0.2 VCC for a logic 0. [2] Interrupt request via Port 3 (P31-P33). [3] Interrupt request via Port 3 (P30). [4] SMR-D5 = 1, POR STOP Mode Delay is on. [5] Reg. WDTMR. [6] The VCC voltage specification of 3.0V guarantees 3.3V 0.3V, and the VDD voltage specification of 5.5V guarantees 5.0V 0.5V. [7] SMR D1 = 0. [8] Maximum frequency for internal system clock is 4 MHz when using XTAL divide-by-one mode. [9] For RC and LC oscillator, and for oscillator driven by clock driver.
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Z86C33/C43 CP95DZ80202
AC ELECTRICAL CHARACTERISTICS Handshake Timing Diagrams
Data In Data In Valid Next Data In Valid
1 3
2
/DAV (Input)
4
Delayed DAV
5
6
RDY (Output)
Delayed RDY
Input Handshake Timing
Data Out
Data Out Valid
Next Data Out Valid
7
/DAV (Output)
8 9 10
Delayed DAV
11
RDY (Input)
Delayed
RDY
Output Handshake Timing
15
Z86C33/C43 CP95DZ80202
AC ELECTRICAL CHARACTERISTICS Handshake Timing Table
TA= 0C to +70C 12 MHz 16 MHz Min Max Min Max 0 0 0 0 155 110 0 0 120 80 0 0 42 42 0 0 160 115 110 80 110 80 110 80 110 80 0 0 31 31 0 0 160 115 110 80 110 80 0 0 0 0 155 110 0 0 120 80 0 0 42 42 0 0 160 115 110 80 110 80 TA = -40C to +105C 12 Mhz 16 MHz Min Max Min Max 0 0 0 0 155 110 0 0 120 80 0 0 31 31 0 0 160 115 0 0 0 0 155 110 0 0 120 80
No Symbol 1 2 3 4 5 6 7 8 9 10 11 TsDI(DAV) ThDI(RDY) TwDAV TdDAVI(RDY)
Parameter Data In Setup Time Data In Hold Time Data Available Width DAV Fall to RDY Fall Delay
VCC Note [1] 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V
Direction Data IN IN IN IN IN IN IN IN IN IN IN IN OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT
TdDAVId(RDY) DAV Out to DAV Fall Delay RDY0d(DAV) TdD0(DAV) RDY Rise to DAV Fall Delay Data Out to DAV Fall Delay
TdDAV0(RDY) DAV Fall to RDY Fall Delay TdRDY0(DAV) RDY Fall to DAV Rise Delay TwRDY RDY Width
TdRDY0d(DAV) RDY Rise to DAV Fall Delay
Notes: [1] Timing Reference uses 0.7 VCC for a logic 1 and 0.2 VCC for a logic 0. [2] The VCC voltage specification of 3.0V guarantees 3.3V 0.3V and the VDD voltage specification of 5.5V guarantees 5.0V 0.5V.
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